Designing a Simple Digital System

£10-78 GBP

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περίπου 9 χρόνια πριν

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1) A 8-bit binary number (limited to 0-255 decimal) on one DE2 board is to be obtained from SW7-SW0, and on the press of KEY0 switch the number is to be transmitted in BCD form via a simple asynchronous serial communications link and the 9-pin D-type connector to a second DE2 board. 2) The communications link is to operate on appropriate voltage levels and comprises two connections: data, ground. 3) A receiver on the second DE2 board is to detect when a transmission has occurred and display the received decimal value on three 7-segment displays

Verilog / VHDL

Ταυτότητα εργασίας: 7724133

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@ahmedmohamed85

Dear sir I have more than 8 years experience in digital design using vhdl please check my profile also please message me so that we can discuss

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6 freelancers δίνουν μια μέση προσφορά £25 GBP για αυτή τη δουλειά

@loi09dt1

Hi Sir, More than 5 years experience on FPGA Design using Verilog and VHDL, Xilinx ISE, Altera Quartus, MicroBlaze, Electronics circuits, MIPS Assembly, LogiSim, Microcontroller such as AVR, ARM, PIC, 8051..., Embedded system, PCB layout, Embedded software, Circuit design. - Some previous projects: + MIPS Single-cycle, Pipeline processor, MicroComputer, PIC and other microprocessor design using Verilog/VHDL. + Matlab and FPGA Implementation of a License Plate Recognition System on FPGA Spartan-6 of Xilinx. + FPGA Implementation of a Fall Detection System on Virtex-5 Xilinx FPGA. + FPGA Implementation of a Fingerprint Identification System on Virtex-5 Xilinx FPGA. + VLSI Implementation of image/video compression in wavelet domain using DWT and SPIHT algorithm + Penalty football game on VGA DE2-70, DE2 Altera + AES 128, 256, 192. + Many projects using LogiSim and MIPS Assembly or Micro-Controller also.

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@zarnescugeorge

Hello! I can help you right away! Please look at my profile! Also send me a message! I have 10 years experience with digital logic design! Have a nice day!

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@adipdutt

How do you want the circuit to be implemented In Pspice (orcad). In simulink In Verilog (not very practical)

£18 GBP σε 2 ημέρες

0,0

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@luvtomar

I recently finished my fourth year of undergraduate electrical engineering at Carleton U. I have 2+ years of experience in using Verilog and VHDL for designing various kinds of digital systems, e.g., FPGA tug of war game, CDR, etc. I have read the details of the project and am confident I can complete it.

£13 GBP σε 1 ημέρα