USB Interface for a Microphone Array

Part A 1. Design mistakes found in the previous version that need to be fixed a. Need a 100 k ohm parallel resistor across Y1 - equivalently, put the resistor across pins 12/13 of PCM2707. b. Update pinout for debug header P1 to be zig-zag instead of row-by-row. In the schematic it was correct, but in the PCB drawing the header footprint had wrong numbering. c. Change jumper W5 so that it is connected by default. Part B 2. Modifications to be implemented in Ver.2 a. Add a 3.5mm headphone jack, which is connected to the headphone output of the PCM2707. Please refer to the datasheet of the PCM2707 for recommended circuit. b. Add a USB hub IC with USB HS support, such as TUSB4020BI. The MCU and PCM2707 will connect to the USB hub, while the USB hub connects to a micro USB socket. The redundant USB socket can be removed from the design. c. Connect one SPI bus of the MCU to the PCM2707, and another SPI bus to the FPGA/Flash memory. Add a sliding switch to change the FPGA’s boot up mode between self-boot via Flash memory (SPI master mode), or waiting to be programmed by the MCU (SPI slave mode). The existing SPI connection between the FPGA and PCM2707 (PCM_MS/MC/MD) can be removed. d. Connect an I2S bus (full duplex) of the MCU to the FPGA. e. Add a sliding switch to MUX the source to the I2S DIN input of PCM2707 between its own I2S DOUT and the DIN output from the FPGA. f. The nSuspend, PSEL and Host pins of PCM2707 can be tied high, while the FSEL pin can be tied low. Since the PCM2707 should always be active, run in the bus powered mode with 500mA max power, and produce I2S output. Other voltage supplies of PCM2707 (Vccp/Vccl/Vccr) may need to be connected to 5v as well. g. Connect all the unused pins on the 40-pin GPIO port to the FPGA in an orderly fashion. Completion of Parts A and B = $50 Part C - $50 PCB design modofication Part D - $450 PCB manufacturing including component cost (5 boards)