Digital Systems Designs Course Homework - System Design using Datapath and Control Subsystems

Objective In this lab, we will build a simple system using datapath and control subsystems. We use buses and standard modules as basic building blocks for the design. The Project Design a simple system that can perform addition, shift, comparison, and masking. The system reads a 8-bit value as input (3-bit instruction set & 5-bit data). There are three 5-bit registers R1, R2, and R3. Registers R1 and R2 store the data. Register R3 presents the result of the calculations. There is also a 1-bit flag for overflow and comparison. It shouldn't take long if you know the stuff. Thank your for viewing. ## Deliverables 1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done. 2) Deliverables must be in ready-to-run condition, as follows? (depending on the nature? of the deliverables): a)? For web sites or? other server-side deliverables intended to only ever exist in one place in the Buyer's environment--Deliverables must be installed by the Seller in ready-to-run condition in the Buyer's environment. b) For all others including desktop software or software the buyer intends to distribute: A software? installation package that will install the software in ready-to-run condition on the platform(s) specified in this bid request. 3) All deliverables will be considered "work made for hire" under U.S. Copyright law. Buyer will receive exclusive and complete copyrights to all work purchased. (No GPL, GNU, 3rd party components, etc. unless all copyright ramifications are explained AND AGREED TO by the buyer on the site per the coder's Seller Legal Agreement). ## Platform Xilinx ISE (you can download the webpack for free from the official website)