Verilog / VHDL Δουλειές και Διαγωνισμοί

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers.
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Εργασία/Διαγωνισμός Περιγραφή Προσφορές/Συμμετοχές Δεξιότητες Ξεκίνησε Τελειώνει Τιμή (EUR)
build a mips recursive quicksort use recursive way to write quicksort in mips, the c code will be offered 4 Γλώσσα Προγραμματισμού C, Verilog / VHDL, Προγραμματισμός C++, Συμβολική Γλώσσα , Επεξεργαστή αρχιτεκτονικής x86/x64 Jan 17, 2018 Σήμερα6μέρα 12ώρα €25
Low end coin FPGA miner information Tell me what you can do to make me an FPGA miner. This is just a paid discussion you don't have to do any work yet. If you can do something for me then we can move forward. Thanks. 10 Ηλεκτρονικά, Verilog / VHDL, Microcontroller, Ηλεκτρική μηχανολογία, FPGA Jan 15, 2018 Jan 15, 20184μέρα 14ώρα €21
vhdl help needed Need constraints file edited in order to make the code work. Small work which will only take few minutes. Vhdl experts contact me please 10 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Jan 15, 2018 Jan 15, 20184μέρα 5ώρα €18
need an expert on vhdl vhdl expert needed to check on the code 8 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Jan 14, 2018 Jan 14, 20184μέρα 2ώρα €14
Fuzzy logic control for PV system Use Fuzzy Logic control with buck-boost converter, for controlling the voltage of PV standalone system with Simulink 20 Μηχανολογία, Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Jan 12, 2018 Jan 12, 20181μέρα 21ώρα €148
Reading the data from FPGA board on Matlab directly I want someone who can help me to read the results data from FPGA board on MATLAB software. Verilog HDL language will be used. 13 Μηχανολογία, Matlab and Mathematica, Verilog / VHDL Jan 12, 2018 Jan 12, 20181μέρα 18ώρα €63
Digital IC Design Assignment Design circuit diagrams and stick diagrams of logic gates to implement their functions. 26 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, Σχεδιασμός Κυκλωμάτων Jan 11, 2018 Jan 11, 20186ώρα 54λ €22
Matlab Simulation-Impulse Voltage generation Need to modify a schematic(.mdl) to get desired results. The .mdl schematic is attached [το url αφαιρέθηκε, συνδεθείτε για να δείτε] need to modify the design to get proper output like Figure 4 12 Μηχανολογία, Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Jan 10, 2018 Jan 10, 2018Έχει λήξει €35
need a VHDL expert asap vhdl expert needed asap to run a code 16 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Jan 10, 2018 Jan 10, 2018Έχει λήξει €16
verilog code need some help with verilog code. 22 Verilog / VHDL, Αρχιτεκτονική Λογισμικού, LabVIEW, Συμβολική Γλώσσα , FPGA Jan 9, 2018 Jan 9, 2018Έχει λήξει €14
License Plate Detection Using VHDL I'm building a license plate detection system, and concept has been proven using MATLAB. The current challenge is to implement the design on an Altera DE Board FPGA using VHDL. At this point, because of time constraints I like to ask for ur assistance in the following areas I seek someone who could help Implement the design on an FPGA. Attached is the matlab code 8 Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Jan 9, 2018 Jan 9, 2018Έχει λήξει €468
VHDL - SRAM -FPGA This is the project: FSM, saving data blocks received via RS-232 with fixed baud rate in external RAM and extracting necessary byte from arbitrary address (selected by slide-switches). - I need VHDL code and Testbench. -Explain its behavior and parts. I am using ZedBoard ZYNQ SOC training , Xilinx Zynq-7000 9 Ηλεκτρονικά, Verilog / VHDL, Microcontroller, Ηλεκτρική μηχανολογία, FPGA Jan 8, 2018 Jan 8, 2018Έχει λήξει €45
Edge detection on Altera DE2-115 Hello, i want to create project using altera DE2-115 board to detect edges on 3 image using sobel filter and show they ober VGA 640x480. To choose which image should be apear is needed 2 swtich. i have done some algorithm with matlab and now i have to implement it on altera. Thanks 16 Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία, LabVIEW Jan 6, 2018 Jan 6, 2018Έχει λήξει €528
This task need to be developed using MATLAB....A cicuit bsed on fuzzy logic to detect different kind of faults L-G,L-L,LLL etc. Fuzzy logic based fault detection 9 Μηχανολογία, Matlab and Mathematica, Verilog / VHDL, Αλγόριθμος, Ηλεκτρική μηχανολογία Jan 6, 2018 Jan 6, 2018Έχει λήξει €29
SFP communication with FPGA Coding required for FPGA to SFP communication 13 Ηλεκτρονικά, Verilog / VHDL, Microcontroller, Ηλεκτρική μηχανολογία, FPGA Jan 6, 2018 Jan 6, 2018Έχει λήξει €735
VHDL for programming FPGA board Hi, I run a small sales business in the video game industry. I am looking for someone with VHDL experience to assign pins on an FPGA board for an old video game system, to a new pre-designed break out board to allow the system to use HDMI. Please contact for details. 18 Verilog / VHDL, FPGA Jan 2, 2018 Jan 2, 2018Έχει λήξει €104
FPGA Design in VHDL Design of FPGA to serve as a memory mapped resource for a local processor module. The processor interface is a memory mapped address/data bus. The FPGA design contains registers, counters and data path functions. System clock frequency is 25MHz. No internal processor is used within the FPGA. An external SRAM is required for expanded data storage. The target FPGA is the Microsemi ProASIC3E. 10 Verilog / VHDL, Σχεδίαση Jan 2, 2018 Jan 2, 2018Έχει λήξει €5607
Project for Varun V. Hi Varun V., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 1 Γλώσσα Προγραμματισμού C, Linux, Verilog / VHDL, Ενσωματωμένο Λογισμικό, Jan 1, 2018 Jan 1, 2018Έχει λήξει €205
Work with Digital Electronic and Analogue... Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 11 Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 28, 2017 Dec 28, 2017Έχει λήξει €21
Work with Digital Electronic and Analogue. Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 11 Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 28, 2017 Dec 28, 2017Έχει λήξει €28
Work with Digital Electronic and Analogue Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 13 Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Dec 28, 2017 Dec 28, 2017Έχει λήξει €27
Work with Digital Electronic and Analogue Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 13 Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 27, 2017 Dec 27, 2017Έχει λήξει €38
Convert some VHDL to Verilog Contact me for more details. All I need done is porting some VHDL to Verilog. 18 Μηχανολογία, Verilog / VHDL, Microcontroller, Αρχιτεκτονική Λογισμικού, FPGA Dec 23, 2017 Dec 23, 2017Έχει λήξει €97
ASIC Design-Verification article on UVM Dear ASIC Verification Experts, I am looking for ghost writer who is from ASIC verification background. I want a unique article which tries to explain why we need to use UVM (Universal Verification Methodology). The title of the article will be similar as this. "If SystemVerilog is so good, why do we need the UVM? ". The article needs to start by answering this question in title. The... 3 Verilog / VHDL Dec 23, 2017 Dec 23, 2017Έχει λήξει €82
vhdl code using altera Design a digital system that will generate police or unbalance siren sound 9 Μηχανολογία, Verilog / VHDL, Microcontroller, Ηλεκτρική μηχανολογία, FPGA Dec 22, 2017 Dec 22, 2017Έχει λήξει €107
Designing Pipelined RISC 32-bit processor by Logisim simulator - 22/12/2017 12:13 EST Objectives :  Using the Logisim simulator  Designing and testing a RISC 32-bit processor Instruction Set Architecture In this project, you will design a simple 32-bit RISC processor with sixteen 32-bit general purpose registers: R0 through R15. R0 is hardwired to zero and cannot be written, so we are left with fifteen registers. There is also one special-purpose 24-bit program counter (PC)... 7 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, Σχεδιασμός Κυκλωμάτων Dec 22, 2017 Dec 22, 2017Έχει λήξει €112
FPGA Project (VHDL floating and real number mathematical operations using Simulink MATLAB) I need a vhdl program allowing FPGA to do aritmetic calculations with real values. For instance summing, substracting, dividing and multiplying 2 real number values as follows: (2.32 + 3.65; 2.32 - 3.65; 2.32/3.65 ; 2.32*3.65) I assume it suppose to be done using some toolbox on MATLAB ( System Generator Toolbox) This code should work on Xilinx Spartan 6. I want the code written simp... 10 Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία, LabVIEW, FPGA Dec 21, 2017 Dec 21, 2017Έχει λήξει €53
Vhdl and test bench for flip flop I need to build a t flip flop in vhdl and write a test bench for it which shows simulation results then using t flip flop implement 4 bit ripple binary counter in a structural method in vhdl and write a test bench and show simulation results it's a report in PDF 8 Verilog / VHDL Dec 20, 2017 Dec 20, 2017Έχει λήξει €56
Parking meter  The project is to design and implement a parking meter. o When you add a coin to the parking meter, time is added during which you can legally park your car. The meter shows the remaining time in a unit of second continuously, and stops at zero.  Types of coins and their worth Pushbutton 0 (PB0) Add 30 seconds Pushbutton 1 (PB1) Add 60 seconds Pushbutton 2 (PB2) Add 120 seconds Pushbutto... 7 Verilog / VHDL Dec 19, 2017 Dec 19, 2017Έχει λήξει €18
Microcontroller design Design and implementation of controller with VHDL in FPGA 13 Ηλεκτρονικά, Verilog / VHDL, Microcontroller, FPGA Dec 19, 2017 Dec 19, 2017Έχει λήξει €117
plc automation RTU commisioning,configuration 8 Ηλεκτρονικά, Verilog / VHDL, Microcontroller, PLC & SCADA, Ηλεκτρική μηχανολογία Dec 19, 2017 Dec 19, 2017Έχει λήξει €18
Generate GPS signal using verilog In my project , I have to generate gps signal using verilog code. For this I need C/A code, random data, carrier signal. So first I have to do bpsk to random data and c/a code then do bpsk with carrier signal . I have given you c/a code you have generate random data , carrier signal and give me output code as well as pictures within 1 or 2 days. 1 Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Dec 19, 2017 Dec 19, 2017Έχει λήξει €29
Simple Verilog code Write a simple verilog code to create dynamic lighting using led. see the attached files and respond 26 Γλώσσα Προγραμματισμού C, Verilog / VHDL, Microcontroller, LabVIEW, FPGA Dec 15, 2017 Dec 15, 2017Έχει λήξει €101
help me with modify some Verilog code know Verilog code, how how to use Quartus and FPGA board. 16 Verilog / VHDL, Microcontroller, Ηλεκτρική μηχανολογία, LabVIEW, FPGA Dec 15, 2017 Dec 15, 2017Έχει λήξει €20
Project for Loi L. Hi Loi L., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 4 Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, , Ψηφιακός Σχεδιασμός, Σχεδιασμός Κυκλωμάτων Dec 14, 2017 Dec 14, 2017Έχει λήξει €86
Simulink design of maximum power point algorithm with DC-DC Converter I want to hire a person which having the knowledge of matlab and simulink, and design the mppt algorithm associated with my idea. Also the person should have the knowledge of electrical like DC-DC converter, basic concept of solar cell, maximum power point algorithm. 23 Μηχανολογία, Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 14, 2017 Dec 14, 2017Έχει λήξει €111
Multiprocessor Scheduling in c++ -- 2 - 13/12/2017 14:32 EST -- 2 Inroduction: This project is about designing and simulating a clock-driven quad-processor scheduler in an object-oriented manner. The scheduler consists of a multi-level job queue where each level follows a different scheduling algorithm viz. Priority, Shortest Job First (SJF) and First-come-first-serve (FCFS). These queues will be enqueued with PCBs. The PCBs can further be classified into Rec... 6 Γλώσσα Προγραμματισμού C, Ηλεκτρονικά, Verilog / VHDL, Microcontroller, Ηλεκτρική μηχανολογία Dec 13, 2017 Dec 13, 2017Έχει λήξει €16
communication using simulink blocks update file of one user to five user 9 Μηχανολογία, Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 12, 2017 Dec 12, 2017Έχει λήξει €102
robust control project design a control system using matlab or simulink 15 Μηχανολογία, Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 12, 2017 Dec 12, 2017Έχει λήξει €38
model in simulink i have model for one user i want update to 5 user and get some results 10 Μηχανολογία, Matlab and Mathematica, Verilog / VHDL, Μηχανική Μηχανολογία, Ηλεκτρική μηχανολογία Dec 12, 2017 Dec 12, 2017Έχει λήξει €307
multisim function generator hi i want someone to connect the function generator and the scope in multisim of electric circuit thank you 9 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, Σχεδιασμός Κυκλωμάτων Dec 11, 2017 Dec 11, 2017Έχει λήξει €19
Simulink to VHDL I have done a controller for a battery energy storage system using Matlab Simulink. I need to generate VHDL codes for my controller. If you have NOT done that, please do not wast my time. 5 Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Dec 11, 2017 Dec 11, 2017Έχει λήξει €19
Microprocessor Project using CodeWarrior Software Hi, Need the completed project in 36 hours. Share the codes in 24 hours and the report in 36 hours. Project details are attached here. Sample codes are attached in the files. You need to use the similar codes for the work 3 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Microcontroller, Ηλεκτρική μηχανολογία Dec 11, 2017 Dec 11, 2017Έχει λήξει €82
VHDL to Verilog Translation I have .vhdl files for an implementation of google chrome's 'dino run' which appears when the user has no wifi connection. However, I would like to have the same functionality with Verilog description language. 9 Verilog / VHDL Dec 10, 2017 Dec 10, 2017Έχει λήξει €98
simulation/ VHDL Expert Needed -- Urgent job -- b I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 7 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Dec 9, 2017 Dec 9, 2017Έχει λήξει €45
simulation/ VHDL Expert Needed -- Urgent job -- 3 I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 3 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 9, 2017 Dec 9, 2017Έχει λήξει €37
simulation/ VHDL Expert Needed -- Urgent job I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 2 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 9, 2017 Dec 9, 2017Έχει λήξει €30
simulation/ VHDL Expert Needed -- Urgent job I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 0 Μηχανολογία, Ηλεκτρονικά, Verilog / VHDL, Ηλεκτρική μηχανολογία, FPGA Dec 9, 2017 Dec 9, 2017Έχει λήξει -
simulation/ VHDL Expert Needed -- 2 I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 4 Μηχανολογία, Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 9, 2017 Dec 9, 2017Έχει λήξει €28
simulation/ VHDL Expert Needed I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 7 Μηχανολογία, Ηλεκτρονικά, Matlab and Mathematica, Verilog / VHDL, Ηλεκτρική μηχανολογία Dec 9, 2017 Dec 9, 2017Έχει λήξει €31
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